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Silicon-On-Insulator Structures

#2509


Technology Development and Production of Silicon-On-Insulator (SOI) Structures by the Bonding of Wafers Using the Radiation-Induced Gas-Stimulated Splitting Method

Tech Area / Field

  • MAT-ELE/Organic and Electronics Materials/Materials
  • MAT-SYN/Materials Synthesis and Processing/Materials
  • PHY-SSP/Solid State Physics/Physics

Status
3 Approved without Funding

Registration date
14.05.2002

Leading Institute
ITEF (ITEP), Russia, Moscow

Supporting institutes

  • Joint Institute of Nuclear Research, Russia, Moscow reg., Dubna\nMoscow State Institute of Electronics Technology (Technical University), Russia, Moscow reg., Zelenograd

Collaborators

  • Silicon Wafer Technologies, Inc., USA, NJ, Newark\nTechnische Universität Ilmenau / Fakultat fur Elektrotechnik und Informationstechnik, Germany, Ilmenau\nPacific Northwest National Laboratory, USA, WA, Richland\nCalifornia State University at Sacramento, USA, CA, Sacramento\nMax-Planck-Institut fur Mikrostrukturphysik, Germany, Halle

Project summary

The target of the Project: development and production of silicon-on-insulator structures as well as submicrotrenches on semiconductors surface by the radiation-induced gas-stimulated splitting method that are designed for manufacture of wide range of special application ICs and micromechanical device elements.

Silicon-on-insulator structures developed and produced will have the following advantages over other known types of SOI-structures and usual substrates of semiconductor materials:

– increased radiation and thermal resistance;


– increased yield of devices (elements and chips smaller dimensions reduce probability of growth defects to be in an active area);
– increased density of elements integration due to formation of submicroprofile "grooves" of 0.1-0.2 micron width;
– simplification - complete absence of latchup effect due to absence of insulation with p-n junctions created by implantation; simplification of insulation and 3-5 times decrease of its dimensions (and the whole chip); combination of many functions on one chip (for example, logical, telecommunicational, and power supply for mobile communications or control functions);
– improved properties: 2-3 times increase of processing speed and/or reduced power consumption at low voltage (less than 1.5 V); operation at ultralow power voltage (~5 V); operation at high temperatures up to 500 °С owing to leakage current decrease at smaller junctions.

The most prospective usage of produced SOI is as follows:

– ULSI production;


– Dynamic RAM of 16 Mbit capacity (16 million transistors);
– Static RAM of 4 Mbit capacity (24 million transistors);
– BiMOS microprocessors with operating frequency of 533 MHz (3 million transistors).

Usage of produced SOI in above mentioned devices will insure significant saving of energy resources, will give additional savings due to greater reliability, will allow to solve some fundamentally new tasks in creation of objects working in extreme conditions. Analysis of semiconductor technologies shows that, in prospective, devices with improved characteristics as compared with similar devices on usual silicon wafers can be produced on SOI structures. Technological processes of IC production adapted to such structures can become the most appropriate basis for manufacture of analog, mixed (bipolar-CMOS-DMOS IC) and digital ICs with utmost technical characteristics. There is a delusion that SOI-structures are worth using only in manufacture of special resistant ICs. Actually, conversion of traditional LSIC and VLSIC production from bulk silicon to modern silicon-on-insulator structures makes it 1.5-2 times more profitable than LSIC and VLSIC production on single crystal substrates. For example, in producing ICs for mass application, the design of CMOS and CBiCMOS elements is simpler because deep pockets and piding p-n junctions are abolished. As the result of element design simplification, the chip area decreases by 30%, and correspondingly the number of chips per wafer increases by about 30%.

As a result, for example, profitability of IC 64M SRAM production on 200 mm SOI structures increases on about 30% as compared with production of such IC on bulk silicon. Simplification of IC design leads to simplification of production technology based on SOI structures. The number of technological steps in IC 64M SRAM production on 200 mm SOI structures decreases by 20% as compared with such production based on standard wafers of bulk silicon. The IC’s design and technology simplification leads on IC’s yield increase. The yield in IC 64M SRAM production on 200 mm SOI structures is 10% higher as compared with such production based on standard wafers of bulk silicon. Increased operational speed is typical for ICs based on SOI structures. IC 1K*8 SRAM on SOI in typical operation mode has 3 times higher operational speed than the similar IC on bulk silicon. A possibility appears to decrease voltage and dissipation power of IC. The ICs on SOI have higher thermal resistance (their operation temperature is up to 300-400 °С).

Simplification of IC design, perfection of inter-element insulation, increase of thermal and radiation resistance lead to IC’s reliability increase. Increased operational speed, thermal resistance and reliability give the ground to manufacturers to increase SOI IC’s prices by 25% as compared to similar ICs on bulk silicon. The design and technology simplification and improved IC’s quality allow manufacturers to increase profit from mass sales of all types of ICs including ICs of wide application. SOI structures offered to development are also starting materials for intellectual ICs with power output channels (smart-ICs) operating at up to 1,500 V voltage. Offered SOI-structures are starting materials for development of quantum ICs (ICs with quantum “points” and “wires” as active elements).

Development of technologies of IC production with complete dielectric insulation started in the beginning of sixties. Replacement of p-n junction insulation of elements by complete dielectric insulation gave hope of improving such IC’s characteristics as operational speed, increased radiation and thermal resistance, etc. However, such structures characterized by high cost, high defect level of working silicon layer, and most production technologies did not achieved for a long time the reliability and quality level that would be sufficient for cost reduction in mass production. Recently interest of specialists in structures with dielectric insulation of components has risen significantly due to the emerging of mass production (SOI structures and ICs based on them), reputation of manufacturers and developers specialized in production and application of structures, investigations and equipment design as well as advertising, numerous publications and wide-spread video information.

The main advantages of SOI structures over bulk silicon consist in the reduced influence of parasitic effects along the perimeter border of the device and reliable insulation of working volume of the device from the rest scheme and the substrate.

Besides, test methods of SOI structure parameters will be worked out and necessary ways and means of their quality analysis will be selected.

On the final stage of the projected works, a decision will be taken on expediency of continuing the works, technology adjustment and production organization based on results of wide-ranging test of SOI structure prototypes.

The design of technological accelerating equipment, methods of radiation-induced gas splitting of brittle solid materials and SOI production technology can be patented.

In the framework of this Project the following is intended:

– development of new technological route of SOI-structure production using the method of chemical surface assembling by molecular deposition and the method of "radiation induced gas-stimulated" splitting;


– update existing equipment and create new multi-purpose irradiation equipment for developing and optimizing radiation technology of SOI production with required parameters;
– update existing equipment and create new equipment for comprehensive investigation of SOI-structure properties;
– update existing equipment and create new equipment for SOI-structure testing and comprehensive test of parameters of SOI-structure assembly-prototypes;
– develop optimal technology of SOI-structure production and create on their base a series of semiconductor components and devices;
– carry out detailed ultramicroscopic investigations (using atomic scanning tunneling microscopy and, probably, auto-ion microscopy) of produced SOI structures;
– optimize SOI structures regarding to rationality of their usage in developed components and devices;
– carry out large scale investigations of SOI structures paying special attention to electrophysical parameters measurements;
– develop theoretical basis of technology and make calculations of electro-physical properties of SOI-structures with various parameters;
– make theoretical evaluation of electrical parameters of various SOI-based devices;
– make theoretical evaluation of marginal properties and parameters of SOI-based devices;
– develop and optimize design of various types of SOI-structures;
– produce functioning prototypes a series of SOI-based components and devices, to carry out their large scale testing;
– optimize geometry and parameters of produced SOI-structures basing on the set of the work results.

As a result of carrying out the Project, it is expected to receive original information concerning:

– technology of SOI-structures production with various parameters, on various substrates, produced by fundamentally different methods;


– improved electro-physical and structural parameters of SOI-structures based on different production technologies;
– marginal mechanical properties of modern SOI-structures;
– irradiation properties of SOI-structures, their resistance to low-energy and high-energy ion bombardment, generation and behavior of defects.

Development of optimal technology of SOI-structure production with required parameters, is intended, and creation, on its basis, of high-efficiency and stable in operational conditions ICs and various semiconductor devices and systems.

The final result of the Project is expected to be creation of high-quality SOI structures complying with modern microelectronics requirements as well as detailed investigation, analysis and optimization of their parameters and characteristics.

The design of technological accelerating equipment, methods of radiation-induced gas-stimulated splitting of brittle solid substances, technology of SOI-structure production and formation of surface "grooves" of submicron size can be patented.

On the final stage of the Project's works, basing on analysis of large scale testing of SOI-structures prototypes, a decision will be taken concerning expediency to continue the investigation, to refine technology and to organize mass production.

Specialists who have earlier been involved in the development of various types of weapon, corresponding materials production, testing of special military equipment, will be recruited.

Compliance with ISTC's goals and tasks: as a result of the Project's fulfillment, re-orientation of scientists and specialists, who worked earlier in the field of creation and testing of weapons, to peaceful activity will be performed; equipment for irradiation of silicon wafers and technology of high-quality SOI-structures will be developed that will allow to develop modern high-intellectual technologies. This, in its turn, will promote transition of Russia to the market economy.

International collaborator's participation: the role of international collaborators in the Project - joint planning, discussions and correction of plans, intermediate and final results of the work; carrying out of some joint investigations and developments; assistance in marketing, possible subsequent joint usage of developed technologies and functioning prototypes (for example, implementation into mass production).


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